An efficient channel model for evaluating Wireless NoC architectures

An efficient channel model for evaluating Wireless NoC architectures
Opoku Agyeman, M., Vien, Q.-T., Hill, G., Turner, S. J. and Mak, T. 
Workshop on Applications for Multi-Core Architectures.  
7th Workshop on Applications for Multi-Core Architectures (WAMCA) 


Abstract
Wireless Networks-on-Chip (WiNoCs) have emerged to solve the scalability and performance bottleneck of conventional wired NoC architectures. However unlike communication in the macro-world, on-chip communication poses several constraints, hence there is the need for simulation and design tools that consider the effect of the wireless channel at the nanotechnology level. In this paper, we present a parameterizable channel model for WiNoCs which takes into account practical issues and constraints of the propagation medium, such as transmission frequency, operating temperature, ambient pressure and distance between the on-chip antennas. The proposed channel model demonstrates that total path loss of the wireless channel in WiNoCs suffers from not only dielectric propagation loss (DPL) but also molecular absorption attenuation (MAA) which reduces the reliability of the system


All views and opinions are the author's and do not necessarily reflected those of any organisation they are associated with. Twitter: @scottturneruon

Meet the Researchers: Michael Opoku Agyeman

Taken from: http://www.computing.northampton.ac.uk/~michael/Publications.html

Book

Michael Opoku Agyeman, 3D Networks-on-Chip Architecture Optimization for Low Power Design, LAP LAMBERT Academic Publishing, 2015.

Journal Papers

1. Michael O. Agyeman, Ali Ahmadinia, Alireza Shahrabi, ”Heterogeneous 3D Network-ON-Chip Archi-tectures: Area and Power Aware Design Techniques,” Journal of Circuits, Systems and Computers, Vol. 22, No. 4 (2013)
2. Michael O. Agyeman, Ali Ahmadinia, Alireza Shahrabi, ”Efficient Routing Techniques in Heteroge-neous 3D Networks-on-Chip,” Parallel Computing, Vol 39, No. 9 (2013)
3. Michael Opoku Agyeman, ”A Study of Optimization Techniques for 3D Networks-on-Chip Archi-tectures for Low Power and High Performance Applications,” International Journal of Computer Applications (IJCA), Vol. 121, No. 6, pp 1-8 (2015)
4. Michael Opoku Agyeman, ”A Low Overhead Fault Reporting Scheme for Resilient 3D Network-on-Chip Applications,” Communications on Applied Electronics (CAE), Vol. 2, No. 4, pp 43-48, 2015
5. Michael Opoku Agyeman, Kenneth Tong, Terrence Mak, ”An Improved Wireless Communication Fabric for Performance Aware Network-on-Chip Architectures,” (invited paper) accepted by: Inter- national Journal of Computing and Digital Systems (IJCDS), 2015
6. Michael O. Agyeman, Ali Ahmadinia, Nader Bagherzadeh, ”Performance and Energy Aware In-homogeneous 3D Networks-on-Chip Architecture Generation,” IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), Vol.PP, No.99, pp.1,1 (2015)

Conference Papers 

1. Michael Opoku Agyeman, Ali Ahmadinia: Power and Area Optimisation in Heterogeneous 3D Networks-on-Chip Architectures. SIGARCH Computer Architecture News 39(4): 2011, 106-107
2. Michael Opoku Agyeman, Ali Ahmadinia, Alireza Shahrabi: Low Power Heterogeneous 3D Networks-on-Chip Architectures. Proceedings of International Conference on High Performance Computing and Simulation (HPCS) 2011: 533-538.
3. Michael Opoku Agyeman, Ali Ahmadinia: Optimising Heterogeneous 3D Networks-on-Chip. Parallel Computing in Electrical Engineering (PARELEC) 2011: 25-30
4. Michael Opoku Agyeman, Ali Ahmadinia: An Adaptive Router Architecture for Heterogeneous 3D Networks-on-Chip, NORCHIP, 2011: 4, 14-15
5. Michael Opoku Agyeman, Ali Ahmadinia: A Systematic Generation of Optimized Heterogeneous 3D Networks-on-Chip Architecture, NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2013: 79-83
6. Michael Opoku Agyeman, Ali Ahmadinia: Optimised Application Specific Architecture Generation and Mapping Approach for Heterogeneous 3D Networks-on-Chip, IEEE International Conference on Computational Science and Engineering (CSE), 2013: 794-801
7. Michael Opoku Agyeman: Optimized Heterogeneous 3D Networks-on-Chip for High Performance System-on-Chip Design, Proceedings of Korean Conference on Semiconductors (KCS), 2014
8. Michael Opoku Agyeman: An Eficient Fault-tolerant Routing Algorithm for 3D Networks-on-Chip, Proceedings of Korean Conference on Semiconductors (KCS), 2014
9. Michael Opoku Agyeman: HetNoC3D: A User Friendly Simulation Framework for Homogeneous and Heterogeneous 3D NoC Architectures, Proceedings of Korean Conference on Semiconductors (KCS), 2014
10. Michael Opoku Agyeman, Ali Ahmadinia: Impact Analysis of Through-Silicon-Via Variation on Per- formance and Energy Consumption of 3D Networks-on-Chip Architectures, 3D Integration Workshop, Proceedings of Design, Automation & Test in Europe (DATE), 2014
11. Michael Opoku Agyeman, Wen Zong, Ji-Xiang Wan, Alex Yakovlev ,Kenneth Tong, Terrence Mak: Novel Hybrid Wired-Wireless Network-on-Chip Architectures: Transducer and Communication Fab- ric Design, International Symposium on Networks-on-Chip (NoCs), 2015: 32:1-32:2
12. Michael Opoku Agyeman, Kenneth Tong, Terrence Mak: An Improved Wireless Communication Fabric for Emerging Network-on-Chip Design, International Conference on Future Networks and Communications (FNC) / International Conference on Mobile Systems and Pervasive Computing (MobiSPC) Affiliated Workshops, 2015: 415 - 420
13. Wen Zong, Michael Opoku Agyeman, Xiaohang Wang, Terrence Mak: Unbiased Regional Congestion Aware Selection Function for NoCs. International Symposium on Networks-on-Chip (NoCs), 2015: 19:1-19:8
14. Michael Opoku Agyeman, Kenneth Tong, Terrence Mak: Reliable and Performance-Aware Communication Fabric for Global Communication in on-Chip Networks, IEEE 28th Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium (DFTS), DFT 2015: 205-210
15. Michael Opoku Agyeman, Ji-Xiang Wan, Quoc-Tuan Vien, Wen Zong, Alex Yakovlev, Kenneth Tong, Terrence Mak: On the Design of Reliable Hybrid Wired-Wireless Network-on-Chip Architectures, IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 2015: 251 - 258

If you'd like to find out more about Computing at the University of Northampton go to: www.computing.northampton.ac.uk. All views and opinions are the author's and do not necessarily reflected those of any organisation they are associated with