Wednesday 11 January 2017

A survey of low power techniques for efficient Network-on-Chip design

Two new papers
A survey of low power techniques for efficient Network-on-Chip design.
Opoku Agyeman, M. and Ofori-Attah, E. 
 In: 23rd IEEE Symposium on High Performance Computer Architecture (HPCA). USA: IEEE.

Abstract
Power consumption continues to be a challenge for designers as the complexity of NoC increases. The scaling down of technology towards the deep nanometer era will only cause an increase in the amount of power NoC components will consume. Therefore, low power design solution is one of the essential requirements of future NoC-based System-on-Chip (SoC) applications. Several techniques have been proposed over the years to improve the performance of the NoCs, trading-off power efficiency; particularly power hungry elements in NoC routers. Power dissipation can be reduced by optimizing the router elements, applying architecture saving techniques and communication links. This paper presents recent contributions and efficient saving techniques at the router, NoC architecture and Communication link level.

For more details: http://nectar.northampton.ac.uk/9086/




A survey of low power NoC design techniques. 
Opoku Agyeman, M. and Ofori-Attah, E.  
In: International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC). Sweden: ACM. (Accepted)

Abstract
As we usher into the billion-transistor era, NoC which was once deemed as the solution is defecting due to high power consumption in its components. Several techniques have been proposed over the years to improve the performance of the NoCs, trading off power efficiency. However, low power design solution is one of the essential requirements of future NoC-based SoC applications. Power dissipation can be reduced by efficient routers, architecture saving techniques and communication links. This paper presents recent contributions and efficient saving techniques at the router, NoC architecture and Communication link level.

For more details A survey of low power NoC design techniques




All views and opinions are the author's and do not necessarily reflected those of any organisation they are associated with. Twitter: @scottturneruon

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