Tuesday 5 June 2018

increasing Instruction Level Parallelism

A study of techniques to increase Instruction Level Parallelism 
Margarita Espinosa Jimenez, L. and Opoku Agyeman, M. (2018) 
 International Symposium on Computer Science and Intelligent Control. Sweden: ISCSIC. 





Abstract
Instruction Level Parallelism (ILP) is the number of instructions that can be executed in simultaneously a program in a clock cycle. The microprocessors exploit ILP by means of several techniques that have been implemented in the last decades and according to the advances that have been obtained in hardware, this survey presents the different techniques that have been used successfully in the execution of multiple instructions of a single program in a single clock cycle.


For more details go to: http://nectar.northampton.ac.uk/10312/



All views and opinions are the author's and do not necessarily reflected those of any organisation they are associated with. Twitter: @scottturneruon

No comments:

Post a Comment