A computing lecturer at the University of Northampton, who is researching into how the efficiency of our everyday devices, such as mobile phones, can be improved, has been awarded the best paper at two recent conferences.
Dr Michael Opoku Agyeman has written several journal papers focusing on how the next generation of technology can meet the ever increasing demands from consumers. He was invited to present his work at the 19th Euromicro Conference on Digital System Design in Cyprus and the Institute of Electrical and Electronics Engineers’ 14th International Conference in Paris.
Part of his research concentrates on whether several processing elements can be incorporated on a single chip, known as System-On-Chip, to improve the efficiency and speed of the computing systems that we use every day, from mobile phones to video-game consoles and even medical equipment. Usually, metal-based interconnecting wires are used for on-chip communication, but Dr Opoku Agyeman is looking into alternative fabrics, such as three dimensional integrated circuits, millimetre wave and surface wave technologies.
Dr Opoku Agyeman explains: “At the heart of each of the devices we commonly use is the processor which keeps it all running. We now expect more features from smaller devices which provide flexibility and efficiency, as well as longer battery life or some type of energy saving mode. To meet these demands, the next generation of devices will need to incorporate the System-On-Chip element and consequently the architecture and communication design techniques must be developed to improve the effectiveness of our computer systems.
“The System-On-Chip combines several components such as processors, peripherals, memory blocks and power management circuits on a single integrated circuit. One issue in particular that dominates next generation designs arises from the non-scalable wire delays and power consumption of the on-chip communication infrastructure.
“To compensate for the fast-paced technological scalability with the performance bottleneck of conventional metal-based interconnects, I have been involved in researching alternative interconnect fabrics. The highlights of my research have so far included an analytical channel model for wireless System-On-Chip design, for which I was awarded the best paper at the Institute of Electrical and Electronics Engineers’ Conference, along with my international collaborative work resulting in a technique that improves the performance of on-chip networks, which was recognised at the Euromicro Conference.
“It is a great honour to be awarded the best paper for both conferences which are highly prestigious.”
All views and opinions are the author's and do not necessarily reflected those of any organisation they are associated with. Twitter: @scottturneruon
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